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The schematic for the QCC-100 is shown below. The quadrature input is received on JP1 and is fed to the PIC12F629 on GP2 and GP3. The PIC counts the quadrature pulses as a 24 bit number. It outputs this 24 bit number in Chinese scale format on GP0 and GP1 which are transmitted out on JP2. The PIC is clocked via a 20MHz ceramic resonator Y1. C1 and C2 are bypass capacitors for the PIC. JP3 is for a header that allows easy access to the 5V and ground rails. Click anywhere on the graphic to download a PDF version of the schematic.
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Copyright © 2003-2009 Scott Shumate. All rights reserved. |
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